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etimologia

instruction set - traduzione in Inglese

SET OF ABSTRACT SYMBOLS (CALLED INSTRUCTIONS) WHICH IDENTIFY AND DESCRIBE OPERATIONS IN A COMPUTER PROGRAM TO A COMPUTER PROCESSOR

Instruction set architectures; Instruction Set Architecture; Instruction Set; Instruction (computer science); Register pressure; Load/store instruction; Load/Store instruction; Electronic action; Zero address machine; Zero-address machine; 0-operand instruction set; Instruction width; Code density; Instruction Sets; Instruction(s) (computer science); Instruction (computing); Native instruction; Variable-length instruction word; Variable-width instruction; Variable width instruction set; Variable width instruction; Variable-width instruction set; Variable length instruction set; Variable length instruction; Variable-length instruction set; Variable-length instruction; Fixed length instruction set; Fixed length instruction; Fixed-length instruction set; Fixed-length instruction; Fixed-width instruction; Fixed-width instruction set; Fixed width instruction; Fixed width instruction set; SIMD instruction; Arithmetic and logic operation; Arithmetic/logic instruction; Load and store instructions; Instruction set; Classification of instruction set architectures

instruction set

общая лексика

набор команд [процессора]

совокупность всех машинных команд, которые исполняются данным процессором. Типичный набор состоит из арифметических и логических команд, команд пересылки данных, команд переходов и ввода-вывода. Набор команд - составная часть архитектуры процессора и может рассматриваться в качестве интерфейса между программным и аппаратным обеспечением. Существуют RISC-, CISC- и VLIW-архитектуры

вычислительная техника

система команд

синоним

command set

Reduced Instruction Set Computer

PROCESSOR EXECUTING ONE INSTRUCTION IN MINIMAL CLOCK CYCLES

Reduced Instruction Set Computer; RISC processor; Reduced Instruction Set Code; Reduced Instruction Set Computing; RISC; RISC-based; RISC-based system; RISC System/6000 SP; Reduced instruction set; RISC architectures; RISC instruction set; RISC-based computer design approach; RISC principles; Reduced instruction set computing

см. RISC

branch instruction

INSTRUCTION IN COMPUTER PROGRAM

Unconditional branching; Jump instruction; Conditional branch; Unconditional branch instruction; Branch instruction; Unconditional branch; Jump (Computer science); Jump (computer science); Branch (instruction); Conditional jump; Branch on condition; Jump target (computing); Branch-free code; Branchless programming; Branchless code; Branchless algorithm

общая лексика

команда перехода

машинная команда или оператор языка программирования, позволяющий изменить порядок выполнения команд или операторов программы

вычислительная техника

команда ветвления

Definizione

кодировка

ж.
То же, что: кодирование.

Mostra altre definizioni

Wikipedia

Instruction set architecture

In computer science, an instruction set architecture (ISA), also called computer architecture, is an abstract model of a computer. A device that executes instructions described by that ISA, such as a central processing unit (CPU), is called an implementation.

In general, an ISA defines the supported instructions, data types, registers, the hardware support for managing main memory, fundamental features (such as the memory consistency, addressing modes, virtual memory), and the input/output model of a family of implementations of the ISA.

An ISA specifies the behavior of machine code running on implementations of that ISA in a fashion that does not depend on the characteristics of that implementation, providing binary compatibility between implementations. This enables multiple implementations of an ISA that differ in characteristics such as performance, physical size, and monetary cost (among other things), but that are capable of running the same machine code, so that a lower-performance, lower-cost machine can be replaced with a higher-cost, higher-performance machine without having to replace software. It also enables the evolution of the microarchitectures of the implementations of that ISA, so that a newer, higher-performance implementation of an ISA can run software that runs on previous generations of implementations.

If an operating system maintains a standard and compatible application binary interface (ABI) for a particular ISA, machine code will run on future implementations of that ISA and operating system. However, if an ISA supports running multiple operating systems, it does not guarantee that machine code for one operating system will run on another operating system, unless the first operating system supports running machine code built for the other operating system.

An ISA can be extended by adding instructions or other capabilities, or adding support for larger addresses and data values; an implementation of the extended ISA will still be able to execute machine code for versions of the ISA without those extensions. Machine code using those extensions will only run on implementations that support those extensions.

The binary compatibility that they provide makes ISAs one of the most fundamental abstractions in computing.

https://en.wikipedia.org/wiki/Instruction set architecture

Traduzione di &#39instruction set&#39 in Russo